FlexiMasters in Integrated Circuit Design

Digital IC Front-End Design

• Design and characterise basic complementary metal–oxide–semiconductor cells
• Implement sequential and combinational digital circuits with Hardware Description Language (HDL)
• Construct testbenches for simulation and design validation
• Perform logic synthesis with technology mapping
• Simulate corner conditions for design optimisation

Digital IC Back-End Design

• Integrate back-end design methodologies within Very-Large-Scale Integration (VLSI) design flow, from synthesis to Graphic Data System II (GDSII)
• Demonstrate proficiency in layout, routing and physical verification using industry-standard Electronic Design Automation (EDA) tools
• Analyse and verify digital designs through timing analysis, Design Rule Checking (DRC), and Layout Versus Schematic (LVS) verification

Digital IC Design for Testability

• Demonstrate the understanding of VLSI testing basics
• Explain IC device failure mechanisms and accelerated testing
• Explain IC fault models, concept of testability, Design for Testability (DFT), Built-In-Self-Test (BIST) and random access memory test
• Identify key techniques for test vector generation and fault simulation
• Compare functional testing with current-based testing

Digital Integrated Circuit Design

• Understand transistor device physics, as well as the secondary effects of these devices
• Appreciate basic silicon device processes and be able to draw layout for a block of CMOS circuits
• Analyse and design digital CMOS circuits with high speed and low power considerations
• Describe the Bipolar CMOS (BiCMOS) processes and be able to analyse and design BiCMOS digital circuits
• Explain digital functional modules and more complex digital integrated systems with low power consumption

Computer Architecture

• Understand the fundamentals of computer design, including machine models and the concept of stored-programme computers, and the components of a modern Central Processing Unit (CPU), including the Arithmetic Logic Unit (ALU) and registers, from the transistor-level to the combinatorial circuits and memory units
• Understand the design of simple instruction set architectures, including Multi-Directional Impact Protection System (MIPS)
• Understand how a CPU communicates via buses with Input/Output devices

• Compare performance of computers and storage devices in various dimensions
• Deduce the method of improving CPU performance through a cache memory with the use of temporal and spatial locality
• Describe the five steps of a DLX machine operating on un-pipelined hardware and explain the DLX main features such as fixed instruction format, fixed instruction length, Load/Store architecture, different addressing modes and the use of numerous registers
• Differentiate the structural, data and control hazards associated with pipelined DLX execution and be able to devise methods to remove or reduce these hazards